Sunday, 26 November 2017

ADP7000 Series 10-bit Digitizers

ADP7000 Series 10-bit Digitizers combined with DP7000 Digital Processor (2.5x more processing power than ADC6000) 10‑bit A/D Converters with 32 Gsa/s sampling rate with up to 2 channels of 10 GHz analog bandwidth Each channel has adjustable front-end (-32 dBm to +22 dBm with 1 dB steps) Full-scale (FS) noise floor down to −160 dB/Hz 128 GBytes of acquisition memory per module FPGA-based reconfigurable digital signal processing with up to Real-Time 32 Gsa/s processing speed Up to Real-Time digital full band frequency and phase response equalization Real-Time digital down conversion DDC with frequency and phase response equalization option Real-Time data streaming to external devices via Optical Data Interfaces (ODI) High-speed data transfer to host computer and graphics processors (GPU) for fast signal processing ADP7000 Series 10-bit Digitizers OverviewApplication SoftwareRF characteristicsSpecificationsOrdering and AvailabilityBrochure and Flyer Guzik AXIe ADP7000 Series Modular Digitizer and Digital Processor combine high-speed waveform digitizer with built-in digital signal processing, which both enable mixed-domain signal capture and analysis with high-speed data transfer links to computers. The ADP7000 Modules come in a display-less 2U high 19” AXIe modular form factor. The product addresses demanding ATE and OEM systems applications in advanced research such as 5G, hydrodynamics, plasma fusion, rotational spectroscopy, semiconductor, physics, astronomy, wireline and wireless communications analysis, aerospace, defense, avionics, military, radar electronics and a variety of other disciplines. The wide analog bandwidth and high sampling rate of the digitizers provide multi band coverage on multiple input channels. For example, the direct RF-sampling capabilities of the digitizers cover radar signals in HF, VHF, UHF, L-, S-, C-, and part of X-band. Direct RF-sampling reduces the overall system complexity by eliminating several input analog down-conversion stages. The waveform digitizer ADP7000 series modules feature 10-bit Keysight Analog to Digital A/D converters with sampling rates up to 2×32 Gsa/s and analog bandwidth DC to 10 GHz with range adjustable front end (-32 dBm to +22 dBm with 1 dB steps). ADP7000 with up to 128 GBytes of acquisition memory, delivers the longest waveform capture time window available in a high bandwidth analog to digital converter instrument. ADP7000 features an FPGA-based reconfigurable digital signal processor with up to 2 channel 32 Gsa/s combined processing speed to convey massive time-critical computations directly inside the instrument. The PCI Express Gen 3 link provides fast control access and DMA transfer of the acquired data to the host computer’s GPU and CPU-based processing back-end. The x4 link delivers up to 3.2 GBytes/s data transfer rate in a Gen3 capable AXIe chassis. In addition, four dedicated Optical Data Interfaces can be configured for Real-Time Continuous Streaming to additional DP7000, host PCs or RAIDs at up to 2×32 Gsa/s (80 GBytes/s). A Software Development Kit is supplied to control the instrument and to integrate the ADP7000 into an existing AXIe measurement system. Guzik also supplies Signal Display Soft Front Panel graphical interface application for signal capturing and visualization. The block diagram below shows the main components of the modular instrument: Figure 1. Block Diagram of ADP7000 Module ADP7000 Digitizer Designed for AXIe-1 Standard The 2U AXIe ADP7000 Modular Digitizer installs into an industry standard AXIe-1 chassis together with other instruments, such as Keysight M8190A 12 Gsa/s, M8195A 65 Gsa/s Arbitrary Waveform Generator, and other AXIe-0 or AXIe-1 modular instruments. Guzik AXIe Modular ADP7000 Digitizer ADP7000 Series includes two modules listed in the table below: ADP7104 ADP7084 Input Channels 4 4 Analog Bandwidth (-3dB) 10 GHz (2-ch mode) 6.5 GHz (4-ch mode) 8 GHz (2-ch mode) 4 GHz (4-ch mode) Sampling Rate (per channel) 32 Gsa/s (2-ch mode) 16 Gsa/s (4-ch mode) 20 Gsa/s (2-ch mode) 10 Gsa/s (4-ch mode) Acquisition Memory1 (per channel maximum) 48 GSa (2-ch mode) 24 GSa (4-ch mode) 48 GSa (2-ch mode) 24 GSa (4-ch mode) PCI Express Gen 3 Interface to AXIe chassis X4 standard X4 standard ________________ 1 With 15/16 memory utilization Acquisition System At the heart of the ADP7000 Digitizer Modules are state of the art high-speed real-time 10-bit analog to digital converter (ADC) ASICs supplied by Keysight Technologies, which provide high speed waveform capture with 4x more vertical resolution and better SNR than 8-bit ADC-s A low-noise front-end amplifier/attenuator is connected to each input channel, which enables user selectable wide operational vertical input range. Combined with the DP7000 digital processor with four Intel Arria 10 processing FPGAs with combined 13,504 multipliers and 6 TeraFlops of IEEE754-compliant floating-point DSP cores. The patented2 Guzik digital frequency response equalization further improves the signal fidelity and effective number of bits. At the maximum sampling rate of 32 Gsa/s (31.25 psec per point), the ADP7000 can capture up to 1.5 seconds of a real-time waveform into its ultra-long acquisition memory per channel in two channel mode. ________________ 2 U.S. Patent 7,408,495 Internal Clock Internal clock accuracy is critical for deep-memory applications. The digitizers achieve precise time accuracy with a next-generation premium ultra low phase noise time base architecture. Time scale accuracy of 5 parts per billion after calibration and down to 50 fs of intrinsic jitter. Channel Trigger The ADP7000 features a digital processing trigger. This feature makes use of the real-time hardware waveform processing capability and allows you to define trigger parameters based on the actual digital waveform data. This trigger is available on any input channel. In addition, four external trigger/gate source inputs are provided. Trigger conditions are set using the Signal Display software tool or from your application via SDK. Processing Overview and Capabilities ADP7000 provides various options for signal processing: FPGA, GPU, and CPU-based processing. FPGA-based Processing Inside the ADP7000 are four Intel Altera ArriaTM 10 FPGAs for processing. These core processing elements combined with Guzik’s implementation of customer-specified measurement algorithms provide end users with a truly tailored measurement solution where speed and throughput count. The FPGA-based processor combined with Guzik’s custom engineering capabilities provides you with the possibility to perform digital signal processing directly in ADP7000 prior to sending waveform data out to computer. Many applications may require only processed results to be sent to the host computer rather than raw waveform data. Guzik can work directly with customers to implement custom processing capabilities drawing from years of experience in waveform analysis. Choice of firmware options includes channel equalization, filtering, multi-segment time-tagged acquisition, Real-Time Digital Down Conversion (DDC), Fast Fourier Transform (FFT), Discrete Fourier Transform (DFT), waveform min/max, Real-Time Waveform Averaging, and parameter calculations among others are all available along with application-specific requests. Guzik can provide custom services after a technical consultation regarding the specific application and required processing. The combined FPGA processing resources are listed in the table below: Processing Block Number Notes Logic Cells 2,640,000 Logic Elements Block RAM 8,532 168 M20K memory blocks M20K memory (Mb) Multipliers 13,504 18-bit x 19-bit multipliers Real-Time Stream Processing Architecture via Fiber Optics The ADP7000 introduces Real-Time Stream Processing Architecture via fiber optics interconnect technology. It allows to cascade additional DP7000 processors together with the ADP7000 digitizer to achieve higher memory capacity and processing capabilities. Combined with the Optical Bridge Interface Card the DP7000 can be connected to external PC-s and RAID arrays via the fiber optics interconnect technology. Continuous streaming to additional DP7000-s, host PCs or RAIDs at up to 640 Gbps is shown in the block diagram illustrating the connections and data throughput: PCI Express Host Computer Control Interface The ADP7000 provides PCI Express Gen 3 x4 interface to the AXIe backplane. The PCI Express bridge card installs into the host computer, and a standard PCI Express x8 cable connects the AXIe chassis to the host computer. High speed waveform transfer with sustained data rates up to 3.2 GByte/sec is possible from this port back to the host computer with a Gen3 capable AXIe chassis. GPU-based Processing General-purpose computation on graphic hardware allows developers to reuse the computational algorithms available for GPU or develop their own algorithms on CUDA C or OpenCL. NVidia® GeForce GTX 10804 GPU can be shipped as an option with the ADP7000. It is possible to use any NVidia® GPU with computing capability 2.0 or higher, if its power requirements are satisfied by the computer. ________________ 4 Current configuration. More powerful GPU cards may be shipped in the future CPU-based Processing In addition to FPGA-based and GPU-based computation, customers have an option to perform signal processing using a computer CPU. Multi-core processing libraries, such as OpenMP, allow utilizing full power of modern 12-core CPU computers. Once more powerful computers with additional cores are released, you can upgrade your computer keeping your existing ADP7000 Digitizer Module. Ultra-fast GPU-based FFT Measurements5 ADP7000 performs frequency domain analysis using the Fast Fourier Transform (FFT) calculated on a GPU. Single NVIDIA® GTX GPU card performs FFT calculations at a 2.5 Gsa/s processing speed. This means, for example, that collecting data at 10 Gsa/s for 100 µs, processing in 400 µs, the full signal spectrum up to 5 GHz with resolution bandwidth 10 kHz – 500,000 spectral lines would take less than 0.5 ms. ________________ 5 Available using the Software Development Kit (GSA SDK) Temperature Stabilization The ADP7000 digitizer modules keep constant temperature for the critical A-to-D components for better measurement accuracy. Tested at ambient temperatures from 15°C to 35°C in standard AXIe chassis. External Clock and I/O The ADP7000 Modules feature 50 ohm SMA connectors for inputs and MCX connectors for clock, external gate and control I/O connections. One Synchronization Clock Input and Output. The Synchronization Clock Input supports 50 MHz, 100 MHz or 200 MHz reference clock frequencies. The front-panel built-in Synchronization Clock Distributor allows precise time synchronization of more than one digitizer to increase the number of phase coherent digitizer channels available in a system. One ADC 1 GHz Reference Clock Input and Output. Four Gate Inputs are available to trigger the instrument from external control signals or markers. Four Test Outputs are available for custom application support and system integration. External I/O dynamic scenario port provides real-time control access to processing FPGA’s. Precise DDC carrier frequency, phase and amplitude settings are possible in real-time through the sequencer control. Complex operations such as frequency sweeps are possible. ADP7000 provides a programmable built-in calibrator with a variety of test signals. Automatic calibration routine is run during every application start while initializing the sub-systems to ensure accurate operation of the instrument. In addition, the calibrator signals can be user switched to output the test signals to the front panel output connector. Please contact Guzik Technical Enterprises for more information. Information about the available firmware and software options for the ADP7000: Firmware Option Description ADC_BASE (Digitizer Base License) Base license for one segment simultaneous acquisition and readout of data to the host computer, with patented6 digital Time-Interleaved ADC mismatch, frequency response and phase equalization. Please refer to white paper Equalization of Multiple Interleaved Analog-to-Digital Converters (ADCs) ADC_SM (Segmented Memory Acquisition) Multi segment acquisitions in the Guzik digitizers use a circular acquisition buffer with minimum inter-segment dead-time of 300ns. This allows, for example, to capture up to 64 million repetitive signals with relatively large repetition intervals and better utilize the already large acquisition memory by discarding dead-time in between signals. Down to femtosecond resolution time-tagging allows to know the precise time between each captured waveform segment. Please refer to GSA SDK User’s Guide section 5.1.2 Acquisition Format Specification ADC_BB (Baseband Acceleration) This option allows to modify the internal digital FIR filter amplitude and phase response for the digitizer input channel. Additional frequency response amplitude and phase corrections can be added to compensate for the signal path external to the digitizer input channel. If the bandwidth of signal is smaller than the digitizer analog bandwidth, the baseband digital filter cutoff can be reduced before decimation to increase ENOB and reduce data amount needed to be transferred to the PC for post processing. Please refer to GSA SDK User’s Guide section 5.1.10 Data Sampling Rate Control and 5.1.18 External Filter Correction ADC_BBRT2 (Real-Time 32 Gsa/s Baseband Filtering) To increase acquisition time for longer signals, which have smaller analog bandwidth than the digitizer, the Real-time 32 Gsa/s baseband digital filtering and decimation option can be used to reduce acquisition data and increase ENOB before storing it to the memory. This option enables triggered streaming and recording. Please refer to GSA SDK User’s Guide section 5.7 Performing Data Streaming ADC_ARTDDC (Advanced Real-Time 32 Gsa/s Digital Down Converting) The Real-Time patented7 32 Gsa/s Digital Down Conversion option allows to perform the down conversion in real-time in the ADP7000 digitizer FPGAs. Real-time IF Magnitude triggering can be used to decide if data is to be stored to the digitizer I/Q memory or not. This allows to capture and store only signals of interest within the DDC span and reduces the data amount needed to be transferred to the PC for post processing. Keysight 89600 VSA software can be used to tune each digitizer channel center frequency independently and perform final processing and measurements related to particular transmission standard for measurement channels simultaneously. Please refer to GSA SDK User’s Guide section 5.8 Performing Digital Down Conversion ADC_VSM1 (Variable-Length Segments with ADC_ARTDDC) Variable length segmented memory acquisition allows for segmented capture where each segment has a length optimized to capture RF pulses using the Real-Time IF Magnitude Trigger and have minimal dead time capture. This greatly extends the utility of the memory. Please refer to GSA SDK User’s Guide section 5.9.2 Magnitude Trigger ADC_AVG (High Speed Deep Averaging) Averaging for noise reduction is used in measurements when high dynamic range is required. Averaging is done in real-time in FPGAs thousands of times faster compared to other methods. With the 40-bit 1024K internal accumulator the accuracy of measurements is greatly increased by allowing up-to 4 billion averaged waveforms. This allows viewing side bands spectral regrowth and other repetitive signals previously hidden in the noise. Please refer to GSA SDK User’s Guide section 5.6 Performing Real Time Accumulation Measurement ADC_AVGS (Bundles ADC_SM and ADC_AVG)(High Speed Deep Segmented Averaging) Segmented averaging mode further advances the measurement flexibility by utilizing groups of data of interest into segments. Each segment may either have its own trigger event programmed or just suspend the data accumulation process for specified period of time. Please refer to GSA SDK User’s Guide section 5.6 Performing Real Time Accumulation Measurement ADC_SYNC1 (Multi-Module Synchronization Capability) Multi-module synchronization capability, allows to increase the total number of digitizer channels by combining multiple modules into one instrument. The option enables multichannel phase coherent time-tagged input channels to be triggered from common source or independently. Synchronization is performed during digitizer initialization and channel-to-channel skew is restored and maintained between instrument channels. The digitizers can be setup to follow an external 50 MHz, 100 MHz or 200 MHz time base without uncertainty, which is critical for ATE and OEM systems application. Please refer to GSA SDK User’s Guide section 4.5 Synchronization of Several Digitizers and 5.1.17 Synchronous Acquisition ________________ 6 U.S. Patent 7,408,495 7 U.S. Patent 9,641,191 Signal Connection and Probing For applications that require single ended or differential probing, Guzik recommends the Keysight InfiniiMax series of probing tools for use with the ADP7000 digitizer Modules. Detailed selection information can be found at the following link: http://www.keysight.com/find/probes document 5968-7141EN. A wide variety of probe solutions up to 13 GHz in bandwidth can be purchased directly from Keysight. The Keysight InfiniiMax Series8 features a variety of probe amplifier and body styles. The interface to the ADP7000’s input connector is the Keysight N1022B Probe Adapter, the 1143A Probe Offset Control and Power Module with an additional ruggedized 3.5 mm to SMA cable pictured below. ________________ 8 Keysight and InfiniiMax are registered trademarks of Keysight Technologies. One Guzik ADP7104 AXIe Digitizer and Processor, Keysight M8190A 12 GSa/s Arbitrary Waveform Generator controlled by one Keysight M9537A AXIe High Performance Embedded Controller in a 4U Keysight M9505A AXIe 5-Slot Chassis pictured below:

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